Hardware Description languages

Hardware description languages (HDL) are languages used for the formal description of a hardware behaviour. When we have a lot of software programming languages like C, C++ which are well used in
embedded world, why we need HDLs? The basic reason is software programming languages are not well tuned or designed for implementing two basic attributes of hardware : Time and Concurrency.

In Software, processes are generally described to be executed serially. But in hardware concurrent processes are important and succesfull working of hardware depends on the proper execution during specified clock cycles. Ofcourse, these can be implemented in traditional programming languages like C++, but it is not effective compared to HDLs.

Mainly, HDLs have two purposes:

1. To make a prototype. Means, to write a model for the expected behaviour of the circuit, before the actual circuit is designed and built. In this case, the HDL program is given as input to a Simulator.

2. To make actual hardware. In this case, HDL is used to make detailed description of the hardware and it is given as input to a logic compiler. The output of compiler is used to program a programmable logic device.

How HDL compiler works? HDL compiler works in several stages. First it will generate the logic description file in proprietary format of the chip vendor. For eg : ALTERA, XILINX. Then it is converted to a industry standard format like EDIF( Elctronic Design Interchange Format). Then it is converted to a JEDEC format file. JEDEC format file contains the instructions for a PLD programmer to write the logic to the PLDs like FPGAs and ASICs.

Commonly used HDLs include

1. VHDL( Very High Speed IC Hardware Description Language)
2. Verilog

Some propreitary HDLs like Altera HDL (AHDL) are also available.