Monday, February 18, 2008

Network Processors

It is not a detailed description of how a Network Processor works. Just trying to differentiate Network processor from other common chip solutions.
For networks to effectively handle new applications emerging in the market, they will need to support new protocols that include differentiated services, security, and various network management functions. While networks are demanding equipment with very high throughput, they also need the flexibility to support new protocols and applications. In addition, the ever-changing requirements of network equipment require solutions that can be brought to market quickly.

Today’s legacy network implementations are based on Field Programmable Gate Arrays (FPGAs) for lower layer processing and General Purpose Processors (GPPs) for higher layer processing. Neither of these solutions meets all the requirements that network processing demands. Consider the broad categories of alternatives for system implementation:

ASIC (Application Specific Integrated Circuit) – any hardwired solution.

ASIP (Application Specific Instruction Processor) – an instruction set processor specialized for a particular application domain.

Co-processor – a hardwired, possibly configurable solution with a limited programming interface.

FPGA (Field Programmable Gate Array) – a device that can be reprogrammed at the gate level.

GPP (General Purpose Processor) – a programmable processor for general purpose computing.


There are two main requirements for all these solutions - flexibility and performance. ASICs are the most hardwired (least flexible), but provide the highest performance. GPPs are the most general (flexible) at the cost of the lowest performance. An ASIP for networking provides the right balance of hardware and software to meet all the requirements like:

Performance – by executing key computational kernels in hardware, NPs are able to perform many applications at wire speed.

Flexibility – having software as a major part of the system allows network equipment to easily adapt to changing standards and applications.

Fast TTM – designing software is much faster (and cheaper) than designing hardware of equivalent functionality.

A network processor is an ASIP for the networking application domain – a software programmable device with architectural features and/or special circuitry for packet processing. Main players in the NP market space are AMCC, Agere, Intel, Broadcom, Cisco and Vitesse.

A very detailed analysis of NPs is available in Understanding NPs. Another good article on NPs is from Netrino.

Sunday, February 17, 2008

AVR STK500 Programming

In January i bought a new ATMEL STK500 board and a AVR Dragon board. I did not touch the Dragon board till now. But i could able to program STK500 board using the RS232 connector in the baord. You can view my boards here.

The Atmel AVR STK500 is a starter kit and development system for Atmel's AVR Flash microcontrollers. Most of the AVR microcontrollers are supported with this board. I got two microcontrollers with this board itself : ATMEGA8515L and ATMEGA16. Board is having some switches and LEDs connected to different ports of the microcontroller. This can be used for prototyping. 6 sockets are there for 8, 20 , 28 and 40 pin microcontrollers. Two RS-232 interfaces are there in the board. One for serial programming and the other one to interface with other boards. We can use 10-15 V DC supply.

The suggested way of programming STK500 programming board is using AVR Studio interface software for Windows. And my laptop is not having serial port. So, i bought one USB to serial converter from one electronics shop here. But i could not able to program using AVR microcontroller 8515L using AVR Studio. When programming it is not giving any error, but the load is not working at all..that means LEDs are not blinking(The program was for that purpose..:). Still i dont know what is the problem.

Then i connected the board using Linux. I compiled the program using avr-gcc. Read how to build cross compiler for AVR in my previous post. This time i was successfull. Without no issues, the program loaded to microcontroller and the LEDs started blinking...:)

The program is very simple one. LEDs are connected to PORTB in the microcontroller using switches in the board and connectors.

/* I/O PORT B, DATA DIRECTION REGISTER (0 -> in, 1 -> out) */
#define DDRB (*(volatile unsigned char *)(0x17 + 0x20))

/* I/O PORT B, DATA REGISTER */
#define PORTB (*(volatile unsigned char *)(0x18 + 0x20))

int main(void) {
int i;

/* Set the whole port (all bits) to "output" */
DDRB = 0xff;

while(1) {
/* Turn off all leds connected to port B */
PORTB = 0x00;

/* Delay */
for(i = 0; i < 0xffff; i++);

/* Turn on all leds connected to port B */
PORTB = 0xff;

/* Delay */
for(i = 0; i < 0xffff; i++);
}

return 0;
}

Then , execute following commands.

avr-gcc -mmcu=atmega8515 a.c
avr-objcopy -j .text -j .data -O ihex a.out a.hex
avrdude -p m8515 -c stk500v2 -P /dev/ttyUSB0 -U flash:w:a.hex -v
avr-objcopy is the tool for converting from one object file format to other. Here we are converting from ELF format to Intel Hex format. avrdude is a free software tool for loading the programs to the Flash of AVR microcontrollers.

Saturday, February 16, 2008

Debugging Techniques with an RTOS

Mainly, there are two types of host/target connection for debugging.

1. Dedicated debug connection - here link has no additional function, other than debug.
2. Communication link - used for other purposes, as well as debug.

Dedicated Debug Connection

Typically, this is based upon the JTAG standard. Prior to JTAG becoming common, Motorola introduced Background Debug Mode (BDM), which worked in a similar way. Almost all new processor designs incorporate a JTAG interface for debug.It is a synchronous serial protocol and low-cost connectors are used. Some kind of adapter is required to interface to the host computer. A big advantage of this type of debug connection is that it will even function with a target that is barely working.

So long as the processor has power and a valid clock, a JTAG connection may normally be established. Typically, a target processor is "frozen" (not executing code) while it is communicating with the host over a JTAG connection.

Communication Link

Generally this would be a serial line (RS232, RS422) or Ethernet. However, there are many other possibilities also: USB, PCI Bus, BlueTooth, IRDA. A key requirement is a working target. The hardware must be fully functional - the processor must be capable of executing code and the communications interfaces must be working. The software must, of course, work to the extent that the communications protocols can be supported.This type of RTOS-aware debugging is necessarily more complex. The big advantage of RTOS-aware debugging, over such a link, is flexibility. The target may continue to run while the debugger communicates with it. This is called "run mode debugging."

Debug Modes: There are broadly two modes of RTOS-aware debugging: stop mode and run mode.

Stop Mode

This mode, which is sometimes referred to as the "freeze mode," occurs when the entire system is stopped – when there is no code execution at all. This mode happens when a breakpoint is hit or the operator intervenes. Typically, the target connection is JTAG. Stop mode debug is quite satisfactory for the vast majority of situations and is only problematic on the rare occasions: the bug being sought is closely tied in with the dynamic interaction between tasks.

Run Mode

Run mode is a more sophisticated RTOS-aware debugging set-up, as it allows just parts of a system to be stopped. For example -Just the current task stops, defined group of tasks stop, All tasks stop (but interrupts are still serviced).Run mode needs sophisticated software support on the target.

RTOS-aware Debug Functionality: The two key areas of functionality are the ability to view data and the control of RTOS functions and objects.

Viewing

All of the information concerning the status of a running system is contained in its memory. Meaningful viewing of this data is a matter of knowing where it is located and how it is tructured and formatted. It is necessary to be able to view a list of tasks in the system along with their running state and priority. For each individual task, it is desirable to view local variables, registers and stack.Lists and information about other RTOS objects (e.g. mailboxes, semaphores, messages) are also required.

Controlling

A task-aware debugger may also exercise some control over the target system. There are various possibilities for controlling tasks - a task may be suspended,a new instance of a task may be spawned, a task's priority may be adjusted.

My problems with wireless linux

It is a very simple solution for a very strange problem. Googling also did not help me much in solving this. So, it should be useful for some one.

I was using ubuntu 7.10 Linux distribution with 2.6.22-14 kernel for the last 5 months in my Dell Inspiron 1420. My laptop is having intel 3945 ABG wireless card. Wireless networking was working fine with ipw3945 driver from intel. But for someother purpose, i installed one more kernel. But after rebooting, the wireless card itself was not detected by ubuntu. Checking with dmesg (This command will show the debug messages), i could able to see that it is giving error code -2 (File missing) for the firmware file for the driver ipw3945.
ipw3945: Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux
ipw3945: Copyright(c) 2003-2007 Intel Corporation
ipw3945: Detected Intel PRO/Wireless 3945ABG Network Connection
sda:<3>ipw3945: ipw3945.ucode firmware file req failed: Reason -2
ipw3945: Could not read microcode: -2
ipw3945: probe of 0000:03:00.0 failed with error -2
When i searched google for the solutions, most of the places three solutions was given

1. change the microcode firmware version. Means Get some other version of ipw3945.ucode file and replace the current one.

2. Install iwl3945 driver and corresponding firmware from http://intellinuxwireless.org

3. Try installing compat wireless package.

But none of these, solved my problem. Because all of these solutions are for driver and the corresponding firmware. For the problem was different. The udev version was wrong for the current kernel. udev is the device manager for the Linux 2.6 kernel series. Its primary function is managing device nodes in /dev. It is the successor of devfs and hotplug which means that it handles the /dev directory and all user space actions when adding/removing devices, including firmware load. The reason for this version mismatch was simple. During kernel compilation, i had to install one package from ubuntu. But it changed the dependency packages including udev also.

After installing the latest udev package in my system, wireless started working without any problem...:)

This link also will be useful, when you are getting any errors in linux. These are the common error codes in linux. http://lxr.linux.no/linux/include/asm-generic/errno-base.h#L5

Monday, February 11, 2008

Creating a Windows XP bootable CD

Always it is a good idea to keep Windows XP bootable CD/DVD, if you are a user of XP operating system. Becuase most of the problems happening in XP system can be solved using recovery console in the XP boot disk.

If you have a installation CD (not bootable), it is very easy.

Open Nero image burner. Select the option bootbale data Disc. It will ask for the bootable image. You can download the XP bootable image from here. It will ask to enter some parameters there. Enter Bootable CD type as "No Emulation", Load Segment as 0x7c0 and sector count as 4. In the project properties select file system as "ISO9660", physical format of CD as "CD ROM". Now, add all the contents of installation CD, burn the image. You got a bootable XP disc..!!

If you dont' have a installation CD also, you can create bootable disc. Understanding the boot process of XP (or any other NT based OS) will help for that.
  • The first thing that happens when you power on your PC is Power On Self Test. Hardware such as Memory is tested as well as all other hardware on the system being verified.
  • Once POST completes, the PC will attempt to locate a bootable device configured via the system BIOS/CMOS.
  • Once the bootable device is found, the MBR (Master Boot Record) is loaded into memory.
  • The MBR locates the active partition and loads the boot sector into memory.
  • The boot sector contains the code that starts Ntldr which is the boot strap loader for Windows XP. Ntldr must be located in root folder of the active partition along with Ntdetect.com, boot.ini, bootsect.dos (for dual booting) and Ntbootdd.sys (needed with some SCSI adapters)
  • The operating system is selected by NTLDR.
  • NTLDR will use the Ntdetect.com, boot.ini, and bootsect.dos files to get the proper OS selected and loaded.
  • The system starts in 16-bit real mode, then moves to protected mode at 32-bit.
  • Once NTLDR switches into 32-bit mode, the file system is loaded (NTFS, FAT32, etc) so that the boot.ini can be read and then checked.
  • Once the boot.ini is checked, you select the OS you would like to load.
  • Selecting XP from the boot menu causes Ntldr to run Ntdetect.com to get information about installed hardware.
  • Ntldr then uses the path specified in the boot.ini to find the boot partition.
  • Ntdetect.com can start to gather information about your systems hardware.
  • Once Ntdetect.com collects the needed information, NTLDR loads Ntoskrnl and passes control to it.
  • Ntoskrnl.exe and hal.dll are loaded. Ntoskrnl.exe and Hal.dll must be located in the %SystemRoot%\System32 folder.
  • Next, the Registry is loaded and a hardware profile is selected. If you have multiple hardware profiles created, you may be asked to select from one to load.
  • After you have selected the proper hardware profile (or if the default one just loads), then you will next be greeted by the login prompt.
  • Ntoskrnl.exe starts Winlogon.exe which starts Lsass.exe (Local Security Administration), this is the program that displays the Welcome screen and allows a user to log on with their credentials (user name and password).
So, the required files for booting are Ntldr, Ntdetect.com, and the boot.ini. Copy them from a system running Windows XP to a floppy or CD. Edit the boot.ini to point to the correct partition of OS. Then you can boot from that floppy or CD. But to create a bootable CD with recovery console, we need to copy all the files and folders found in installation CD from the XP system and burn the CD with XP bootable image. These files and folders include I386 folder, Device Drivers folder, WIN51.RC1, WIN51IP.RC1 and setup.exe .

Sunday, February 10, 2008

FPGAs Vs ASICs

Basically Field Programmable Gate Arrays(FPGAs) and Application Specific ICs(ASICs) are Programmable Logic Devices(PLDs). Difference between ASICs and FPGAs mainly depends on costs, tool availability, performance and design flexibility. They have their own pros and cons.A comparison of the advanatages and disadvantages of both of them are given below.

FPGA Design Advanatages
  • Faster time-to-market: No layout, masks or other manufacturing steps are needed for FPGA design. Readymade FPGA is available and developer can directly burn the HDL code.
  • No NRE (Non Recurring Expenses): This cost is typically associated with an ASIC design. For FPGA this is not there. FPGA tools are cheap. Sometimes its free. ASIC youpay huge NRE and tools are expensive.
  • Simpler design cycle: This is due to software that handles much of the routing, placement, and timing. Manual intervention is less.The FPGA design flow eliminates the complex and time-consuming floorplanning, place and route, timing analysis.
  • More predictable project cycle: The FPGA design flow eliminates potential re-spins of the project since the design logic is already synthesized and verified in FPGA device.
  • Field Reprogramability: A new program can be uploaded remotely, instantly. FPGA can be reprogrammed in a snap while an ASIC can take a huge amount of money and time to make the same changes. FPGA costs start from a couple of dollars to several hundreds or more depending on the hardware features.
  • Reusability: Reusability of FPGA is the main advantage. Prototype of the design can be implemented on FPGA which could be verified for almost accurate results so that it can be implemented on an ASIC. If design has faults change the HDL code, generate bit stream, program to FPGA and test again.Modern FPGAs are reconfigurable both partially and dynamically.
  • FPGAs are good for prototyping and limited production.If you are going to make 100-200 boards it isn't worth to make an ASIC.
  • Generally FPGAs are used for lower speed, lower complexity and lower volume designs. But today's FPGAs even run at 500 MHz with superior performance. With unprecedented logic density increases and a host of other features, such as embedded processors, DSP blocks, clocking, and high-speed serial at ever lower price, FPGAs are suitable for almost any type of design.
  • Unlike ASICs, FPGA's have special hardwares such as Multiply and Accumulator modules (MACs) , memories and highspeed I/O, embedded CPU etc inbuilt, which can be used to get better performace. Modern FPGAs are packed with features. Advanced FPGAs usually come with phase-locked loops, low-voltage differential signal, clock data recovery, more internal routing, high speed, hardware multipliers for DSPs, memory,programmable I/O, IP cores and microprocessor cores. Power PC (hardcore) and Microblaze (softcore) in Xilinx and ARM (hardcore) and Nios(softcore) in Altera are examples. There are FPGAs available now with built in ADC. Using all these features designers can build a system on a chip.
FPGA Design Disadvanatges
  • Powe consumption in FPGA is more. You don't have any control over the power optimization. This is where ASIC wins the race.
  • You have to use the resources available in the FPGA. Thus FPGA limits the design size.
  • Good for low quantity production. As quantity increases cost per product increases compared to the ASIC implementation.
ASIC Design Advantages
  • Lower unit costs: For very high volume designs costs comes out to be very less. Larger volumes of ASIC design proves to be cheaper than implementing design using FPGA.
  • ASICs are faster than FPGA: ASIC gives design flexibility. This gives enoromous opportunity for speed optimizations.
  • Low power: ASIC can be optimized for required low power. There are several low power techniques such as power gating, clock gating, multi vt cell libraries, pipelining etc are available to achieve the power target. This is where FPGA fails badly !!! Can you think of a cell phone which has to be charged for every call.....never.....low power ASICs helps battery live longer life.
  • In ASIC you can implement analog circuit, mixed signal designs. This is generally not possible in FPGA.
  • In ASIC DFT (Design For Test) is inserted. In FPGA DFT is not carried out.
ASIC Design Disadvantages
  • Time-to-market: Some large ASICs can take a year or more to design. A good way to shorten development time is to make prototypes using FPGAs and then switch to an ASIC.
  • Design Issues: Signal Integrity isuues and many more. In FPGA you don't have all these because ASIC designer takes care of all these. ( Don't forget FPGA is an IC and designed by ASIC design enginner !!)
  • Expensive Tools: ASIC design tools are very much expensive. You spend a huge amount of NRE.
A good article (more technical one) comparing each factors determining the selection fo ASICs and FPGAs is available here:

http://www.soccentral.com/results.asp?CategoryID=488&EntryID=15887


Note: Analysis , Synthesis, floorplanning, place and route, timing analysis and verification are some of the steps in the design flow of ICs. Will explain about these steps in some other post.

Friday, February 8, 2008

Hardware Description languages

Hardware description languages (HDL) are languages used for the formal description of a hardware behaviour. When we have a lot of software programming languages like C, C++ which are well used in
embedded world, why we need HDLs? The basic reason is software programming languages are not well tuned or designed for implementing two basic attributes of hardware : Time and Concurrency.

In Software, processes are generally described to be executed serially. But in hardware concurrent processes are important and succesfull working of hardware depends on the proper execution during specified clock cycles. Ofcourse, these can be implemented in traditional programming languages like C++, but it is not effective compared to HDLs.

Mainly, HDLs have two purposes:

1. To make a prototype. Means, to write a model for the expected behaviour of the circuit, before the actual circuit is designed and built. In this case, the HDL program is given as input to a Simulator.

2. To make actual hardware. In this case, HDL is used to make detailed description of the hardware and it is given as input to a logic compiler. The output of compiler is used to program a programmable logic device.

How HDL compiler works? HDL compiler works in several stages. First it will generate the logic description file in proprietary format of the chip vendor. For eg : ALTERA, XILINX. Then it is converted to a industry standard format like EDIF( Elctronic Design Interchange Format). Then it is converted to a JEDEC format file. JEDEC format file contains the instructions for a PLD programmer to write the logic to the PLDs like FPGAs and ASICs.

Commonly used HDLs include

1. VHDL( Very High Speed IC Hardware Description Language)
2. Verilog

Some propreitary HDLs like Altera HDL (AHDL) are also available.

Saturday, February 2, 2008

Linux 2.6 kernel compilation for ubuntu

This is the procedure for compiling the Linux 2.6 kernel in Ubuntu 7.10. But in almost all systems, it is almost same procedure. In ubuntu , by defaull there is no root user. So, always use sudo -s before executing the following commands.

First step is to get the latest kernel source (or whichever you want) from kernel.org to /usr/src. I used linux-2.6.23. Now untar the source using:

tar -xjvf linux-2.6.23.tar.bz2 -C /usr/src/linux-2.6.23.


Go inside the source foder : cd /usr/src/linux-2.6.23. Assuming that you have installed gcc already. Now we have to conbfigure the kernel for building. There are different commands for that. But the easy and useful one is make menuconfig. Ubuntu uses a configuration mechanism using ncurses package. So, it may give some errors. We have to install ncurses and the depending packages.

sudo apt-get install ncurses
sudo apt-get install ncurses-developer
sudo apt-get install libncurses5-dev

Then make menuconfig will result in the menu based configuration. Here we have to select all configuration carefully. But help is very good. So, it is easy.

Now, compile the kernel using make command. it will take about 1 hour, depending on our configuration. Now install all the modules using make modules_install.

Finally, we can install the kernel using make install. It will install three files in the /boot directory.

System.map-2.6.23
config-2.6.23
vmlinuz-2.6.23

So, kernel is built. So, now we have to create the initrd image( This is needed to load the rest of the OS in some systems) using the command mkinitrd -o initrd.img-2.6.23 2.6.23.

mkinitrd is replaced with mkinitramfs in the latest systems. In that case use the command mkinitramfs -o initrd.img-2.6.23 2.6.23.

Now, bootloader should be configured to detect our new kernel. If you are using GRUB, update-grub command will update it automatically. But from my experience it is better to update manually. Because i used update-grub. But it is updating the kernel root device using the UUID instead of /dev/sda6 in menu.lst file.But after rebooting my system did not boot, because some GRUB versions will not understand UUID. I had to change UUID to the corresponding root device. In my case it was hd0,5. So changed it as /dev/sda6, by manual editing by pressing 'e', when GRUB menu appears.

So, better change the Grub configuration file as follows.

vi /boot/grub/menu.lst

Add the following lines in the file( Depending n your root device and kernel name.
title           Debian GNU/Linux, kernel 2.6.23 Default
root (hd0,5)
kernel /boot/vmlinuz-2.6.23 root=/dev/sda6 ro
initrd /boot/initrd.img-2.6.23
savedefault
boot
Now just reboot. Hopefully, our new kernel should be detected by GRUB and it should boot up ptoperly( Hopefully..). But not sure. But if the make menuconfig was correct and we added all needed device drivers into the kernel( Especially SATA driver), it will come up. Otherwise change some boot options manually, boot in to the system. Compile one more time with the correct make menuconfig.

Linux loadable kernel moduels

Linux uses a monolithic architecture with file systems, device drivers, and other modules statically linked into the kernel image to be used at boot time. The use of dynamic kernel modules allows you to write portions of the kernel as separate objects that can be loaded and unloaded on a running system.

A kernel module is simply an object file containing routines and/or data to load into a running kernel. When loaded, the module code resides in the kernel's address space and executes entirely within the context of the kernel. Technically, a module can be any set of routines, with the one restriction that two functions, init_module() and cleanup_module(), must be provided. The first is executed once the module is loaded, and the second, before the module is unloaded from the kernel.The main functions to use to load /unload and inspect kernel modules are contained in the modutils package. They are:

/sbin/insmod (insert a module into the running kernel)

/sbin/rmmod (remove a module from the running kernel)

/sbin/lsmod (inspect modules in the running codes)

Note that to manage with kernel modules you have to be root. Use sudo command in ubuntu.

Once a module is loaded, it passes to form part of the operating system, hence it can use all the functions and access all variables and structures of the kernel. Similarly the global symbols created are made available or exported to other modules. If you don't want to share some symbol (variable or function), you have to declare it as static.

A module is built from a "C" source. Here is the simplest example of a kernel module, say hello.c

#include        /* Needed by all modules */
#include /* Needed for KERN_INFO */
#include /* Needed for the macros */

static int __init hello_start(void)
{
printk(KERN_INFO "Loading hello module...\n");
printk(KERN_INFO "Hello world\n");
return 0;
}

static void __exit hello_end(void)
{
printk(KERN_INFO "Goodbye Mr.\n");
}

module_init(hello_start);
module_exit(hello_end);

The compilation of the kernel module is different for Linux kernel 2.4 and 2.6. For checking Kernel versin
use the 'uname' command. The procedure given below is for 2.6 kernel.
Then we can create a makefile for compiling this with the following text.

obj-m = hello.o
KVERSION = $(shell uname -r)
all:
make -C /lib/modules/$(KVERSION)/build M=$(PWD) modules
clean:
make -C /lib/modules/$(KVERSION)/build M=$(PWD) clean

Compile the hello.c file by using the command : make

Here , it may give error "Nothing to be done for all". The problem is you did not compile the Linux kernel till now.
So, compile the linux kernel by following the procedure given here:


http://embeddedbox.blogspot.com/2008/02/linux-26-kernel-compilation-for-ubuntu.html

After that make should generate hello.ko. This is the kernel module.
Now, we can insert the kernel module to Kernel using
insmode hello.ko


Check whether it is loaded properly with lsmod.

Note: Kernel offers a different version of printf() called printk().This works almost identically to the first except that it sends the output to a kernel ring buffer.
At any istant you can examine the contents of the buffer using the command dmesg.

You can get more information about linux kernel module programming from tldp.

Friday, February 1, 2008

Flash Memory

Memory can be split into two main categories: volatile and nonvolatile. Volatile memory loses its content when the system is powered off. Nonvolatile memory does not lose its data when the system or device is turned off. RAM is an example of volatile memory. ROM is an example of non-volatile memory. Different types of ROM are Programmable (PROM), Erasable Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM).

Flash memory is a type of EEPROM. The read/write behaviours of flash memory is very different than that of other programmable memories, such as volatile ram and magnetic disks. The most important characteristics of Flash memory are

1. Memory cells in a flash device can be written to only a limited number of times, between 10,000 and 1,000,000, after which they wear out and become unreliable.

2. Flash devices are available in two major types

NOR Flash -which is directly accessible by the processor.
NAND Flash - which is addressable only through a separate controller.

3. Flash chips are arranged into memory blocks. Resetting bits from zero to one( Erase) cannot be done individually, but only by erasing a complete block. Erase block sizes of NOR and NAND Flashes are different.

4. Write operations of a flash can only clear bits (change their value from 1 to 0). The only way to set bits (change their value from 0 to 1) is to erase an entire region memory, called erase units or memory blocks.

5. Flash Chip users should use a process known as "wear levelling" to ensure the even distribution of usage of each block. Means a single block should not become unusable before the Flash chip.

NAND Flashes are further divided into pages which are typically 512 bytes in size.

Real Time Application Interface for Linux

A real time system can be defined as a "system capable of guaranteeing timing requirements of the processes under its control". Real time system can be broadly classified into soft real time systems and hard real time systems. In hard real time systems, the completion of an operation after its deadline is considered useless - ultimately, this may lead to a critical failure of the complete system. A soft real-time system on the other hand will tolerate such latency, and may respond with decreased service quality (e.g., dropping frames while displaying a video).

RTAI is not a real time operating system, such as RTLinux, VXworks or pSOS. It is based on the Linux kernel, providing the ability to make it fully pre-emptable. RTAI offers the same services of the Linux kernel core, adding the features of an industrial real time operating system. It consists basically of an interrupt dispatcher: RTAI mainly traps the peripherals interrupts and if necessary re-routes them to Linux. It is not an intrusive modification of the kernel; it uses the concept of HAL (hardware abstraction layer) to get information from Linux and to trap some fundamental functions. RTAI considers Linux as a background task running when no real time activity occurs.

How to install RTAI in Linux:

RTAI is module oriented approach. To understand about the linux loadable kernel modules read this post.

http://embeddedbox.blogspot.com/2008/02/linux-loadable-kernel-moduels.html

The installation for ubuntu hardy is explained very well here : https://woc.uc.pt/deec/getFile.do?tipo=2&id=5690 . Basically the installation for any distribution, this procedure is same.

These are some good links about RTAI:

1. https://www.rtai.org/

2. http://rtportal.upv.es/comparative/rtl_vs_rtai.html

3. http://www.captain.at/rtai.php